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utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 1 ? features access time : 35/70ns (max.) low power consumption: operating : 40/30 ma (typical.) standby : 2ua (typ.) l-version 1ua (typ.) ll-version single 5v power supply extended temperature : -20 ~80 all inputs and outputs are ttl compatible fully static operation three state outputs data retention voltage : 2v (min.) package : 28-pin 600 mil pdip 28-pin 330 mil sop 28-pin 8mmx13.4mm stsop functional block diagram column i/o column decoder row decoder i/o control logi c control a4 i/o1 v ss v cc we oe ce i/o8 . . . . . . . . . a3 a 14 a 13 a 12 a7 a6 a5 a8 a 9 a 2 a 1 a 0 a 10 . . . . . . memory array 512 rows 512 columns a 11 pin description symbol description a0 - a14 address inputs i/o1 - i/o8 data inputs/outputs ce chip enable input we write enable input oe output enable input v cc power supply v ss ground general description the ut62256c(e) is a 262,144-bit low power cmos static random access memory organized as 32,768 words by 8 bits. it is fabricated using high performance, high reliability cmos technology. the ut62256c(e) is designed for high-speed and low power application. it is particularly well suited for battery back-up nonvolatile memory application. the ut62256c(e) operates from a single 5v power supply and all inputs and outputs are fully ttl compatible pin configuration a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 vcc a8 a9 a11 a10 i/o8 i/o7 i/o6 i/o5 i/o4 i/o3 vss ut62256c pdip/sop 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 ce we oe a13 a14 i/o4 a11 a9 a8 a13 i/o3 a10 a14 a12 a7 a6 a5 vcc i/o8 i/o7 i/o6 i/o5 vss i/o2 i/o1 a0 a1 a2 a4 a3 ut62256c stsop 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 we oe ce
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 2 ? absolute maximum ratings * parameter symbol rating unit terminal voltage with respect to v ss v term -0.5 to +7.0 v operating temperature t a 0 to +70 storage temperature t stg -65 to +150 power dissipation p d 1 w dc output current i out 50 ma soldering temperature (under 10 secs) tsolder 260 *stresses greater than those listed under ?absolute maximum ra tings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sect ions of this specification is not implied. ex posure to the absolute maximum rating condit ions for extended period may affect device reliability. truth table mode ce oe we i/o operation supply current standby h x x high - z i sb , i sb 1 output disable l h h high - z i cc, i cc 1, i cc 2 read l l h d out i cc, i cc 1, i cc 2 write l x l d in i cc, i cc 1, i cc 2 note: h = v ih , l=v il , x = don't care. dc electrical characteristics (v cc = 5v10%, t a = -20 ~80 ) parameter symbol test condition min. typ. max. unit input high voltage v ih 2.2 - v cc +0.5 v input low voltage v il - 0.5 - 0.8 v input leakage current i li v ss Q v in Q v cc - 1 - 1 a output leakage current i lo v ss Q v i/o Q v cc ce =v ih or oe = v ih or we = v il - 1 - 1 a output high voltage v oh i oh = - 1ma 2.4 - - v output low voltage v ol i ol = 4ma - - 0.4 v - 35 - 40 50 ma i cc cycle time=min ce = v il ,i i/o = 0ma ,. - 70 - 30 40 ma i cc 1 cycle time=1 s, ce =0.2v; i i/o =0ma, other pins at 0.2v or v cc -0.2v - - 10 ma operating power supply current i cc 2 cycle time=500ns, ce =0.2v;i i/o =0ma, other pins at 0.2v or v cc -0.2v - - 20 ma standby current (ttl) i sb ce =v ih - - 3 ma i sb1 ce R v cc -0.2v -l - 2 100 a standby current (cmos ) -ll - 1 50 a
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 3 ? capacitance (ta=25 , f=1.0mhz) parameter symbol min. max unit input capacitance c in - 8 pf input/output capacitance c i/o - 10 pf note : these parameters are guaranteed by device characterization, but not production tested. ac test conditions input pulse levels 0v to 3.0v input rise and fall times 5ns input and output timing reference levels 1.5v output load c l = 100pf, i oh /i ol = -1ma/4ma ac electrical characteristics (v cc = 5v10% , t a = -20 ~80 ) (1) read cycle parameter symbol ut62256c(e)-35 ut62256c(e)-70 unit min. max. min. max. read cycle time t rc 35 - 70 - ns address access time t aa - 35 - 70 ns chip enable access time t ace - 35 - 70 ns output enable access time t oe - 25 - 35 ns chip enable to output in low z t clz* 10 - 10 - ns output enable to output in low z t olz* 5 - 5 - ns chip disable to output in high z t chz* - 25 - 35 ns output disable to output in high z t ohz* - 25 - 35 ns output hold from address change t oh 5 - 5 - ns (2) write cycle parameter symbol ut62256c(e)-35 ut62256c(e)-70 unit min. max. min. max. write cycle time t wc 35 - 70 - ns address valid to end of write t aw 30 - 60 - ns chip enable to end of write t cw 30 - 60 - ns address set-up time t as 0 - 0 - ns write pulse width t wp 25 - 50 - ns write recovery time t wr 0 - 0 - ns data to write time overlap t dw 20 - 30 - ns data hold from end of write time t dh 0 - 0 - ns output active from end of write t ow* 5 - 5 - ns write to output in high z t whz* - 15 - 25 ns *these parameters are guaranteed by device char acterization, but not production tested.
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 4 ? timing waveforms read cycle 1 (address controlled) (1,2,4) t rc address dout data valid t aa t oh t oh read cycle 2 ( ce and oe controlled) (1,3,5,6) d out address ce oe t rc t aa t ace t oe t clz t olz high-z t ohz t chz data valid high-z t oh notes : 1. we is high for read cycle. 2. device is continuously selected ce =v il. 3. address must be valid prior to or coincident with ce transition; otherwise t aa is the limiting parameter. 4. oe is low. 5. t clz , t olz , t chz and t ohz are specified with c l = 5pf. transition is measured 500mv from steady state. 6. at any given temperature and voltage condition, t chz is less than t clz , t ohz is less than t olz.
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 5 ? write cycle 1 ( we controlled) (1,2,3,5) d out t wc t aw t cw t wp t ow t as t whz ( 4 ) high-z t dw t dh (4) address ce d in data valid we t wr write cycle 2 ( ce controlled) (1,2,5) high-z (4) data valid d out t wc t aw t cw t wp t whz t as t wr t dw t dh address ce we d in notes : 1. we or ce must be high during all address transitions. 2. a write occurs during the overlap of a low ce and a low we . 3. during a we controlled with write cycle with oe low, t wp must be greater than t whz +t dw to allow the drivers to turn off and data to be placed on the bus. 4. during this period, i/o pins are in the output state, and input signals must not be applied. 5. if the ce low transition occurs simultaneously with or after we low transition, the outputs remain in a high impedance state. 6. t ow and t whz are specified with c l = 5pf. transition is measured 500mv from steady state.
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 6 ? data retention characteristics (ta = -20 ~80 ) parameter symbol test condition min. typ. max. unit vcc for data retention v dr ce R v cc -0.2v 2.0 - 5.5 v data retention current i dr vcc=3v - l - 1 50 a ce R v cc -0.2v - ll - 0.5 20 a chip disable to data t cdr see data retention 0 - - ns retention time waveforms (below) recovery time t r t rc* - - ns t rc* = read cycle time data retention waveform t cdr t r 4.5v v cc ce v ss data retention mode v dr R 2v ce R v cc -0.2v 4.5v
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 7 ? package outline dimension 28 pin 600 mil pdip package outline dimension unit symbol inch(min) inch(max) a - 0.220 a1 0.015 - d 1.455 1.47 e 0.6 0.6 e1 0.54 0.54 eb 0.63 0.67 0 o 15 o c
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 8 ? 28 pin 330 mil sop package outline dimension unit symbol inch(base) mm(ref) a 0.120 (max) 3.048 (max) a1 0.002(min) 0.05(min) a2 0.098 0.005 2.489 0.127 b 0.0016 (typ) 0.406(typ) c 0.010 (typ) 0.254(typ) d 0.728 (max) 18.491 (max) e 0.340 (max) 8.636 (max) e1 0.465 0.012 11.811 0.305 e 0.050 (typ) 1.270(typ) l 0.05 (max) 1.270 (max) l1 0.067 0.008 1.702 0.203 s 0.047 (max) 1.194 (max) y 0.003(max) 0.076(max) 0 o ? 10 o 0 o ? 10 o b c e
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 9 ? 28 pin 8x13.4mm stsop package outline dimension note e dimension is not including end flash the total of both sides? end flash is not above 0.3mm. unit symbol inch(base) mm(ref) a 0.047 (max) 1.20 (max) a1 0.004 0.002 0.10 0.05 a2 0.039 0.002 1.00 0.05 b 0.006 (typ) 0.15(typ) c 0.010 (typ) 0.254(typ) db 0.465 0.004 11.80 0.10 e 0.315 0.004 8.00 0.10 e 0.022 (typ) 0.55(typ) d 0.528 0.008 13.40 0.20 l 0.020 0.004 0.50 0.10 l1 0.0315 0.004 0.80 0.10 y 0.08(max) 0.003(max) 0 o ? 5 o 0 o ? 5 o 2 2 2 2 5
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 10 ? ordering information part no. access time (ns) standby current ( a) package ut62256cpc-70e 70 5 ma 28pin pdip ut62256cpc-70le 70 100 a 28pin pdip ut62256cpc-70lle 70 40 a 28pin pdip ut62256csc-35e 35 5 ma 28pin sop ut62256csc-35le 35 100 a 28pin sop ut62256csc-35lle 35 40 a 28pin sop ut62256csc-70e 70 5 ma 28pin sop ut62256csc-70le 70 100 a 28pin sop ut62256csc-70lle 70 40 a 28pin sop UT62256CLS-35LE 35 100 a 28pin stsop ut62256cls-35lle 35 50 a 28pin stsop ut62256cls-70le 70 100 a 28pin stsop ut62256cls-70lle 70 40 a 28pin stsop
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 11 ? revision history revision description date rev. 1.0 1. original. sep 3 ,2001
utron ut62256c(e) rev. 1.0 32k x 8 bit low power cmos sram utron technology inc. p80071 1f, no. 11, r&d rd. ii, science-based industr ial park, hsinchu, taiwan, r. o. c. tel: 886-3-5777882 fax: 886-3-5777919 12 ? this page is left blank intentionally.

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